1. Field of the Invention
The present invention relates to a data programming method. More particularly, the present invention relates to a data programming method simultaneously considering a programming speed and a storage capacity, a flash memory storage device and a flash memory controller.
2. Description of Related Art
Since a flash memory has advantages of non-volatile, low power consumption, small volume and non-mechanical structure, etc., it is widely used in various electronic devices. More and more portable storage devices such as memory cards or flash drives take the flash memory as a storage medium.
The flash memory has a plurality of physical blocks, and each of the physical blocks has a plurality of physical pages, wherein data is programmed into the physical block according to a sequence of the physical pages. Moreover, the flash memories can be classified into single level cell (SLC) NAND flash memories and multi level cell (MLC) NAND flash memories according to a number of bits that can be stored by each memory cell thereof. In the SLC NAND flash memory, each memory cell can only store one bit of data. In the MLC NAND flash memory, an electric charge in one memory cell can be identified using a plurality of levels. Therefore, in the MLC NAND flash memory, one memory cell can store multiple bits of data. Accordingly, in case of a same number of the memory cells, a page number of the MLC NAND flash memory is several times greater than that of the SLC NAND flash memory.
Because one memory cell may stores multiple bits of data in the MLC NAND flash memory, the program for the physical blocks of the MLC NAND flash memory includes a plurality of phases. Taking a 2 level cell NAND flash memory as an example, programming of the physical blocks includes a first phase and a second phase. In a first phase, lower pages are programmed, and a physical property thereof is similar to that of a SLC NAND flash memory, and after the first phase, upper pages are programmed. Generally, a programming speed of the lower page is faster than that of the upper page.
However, the pages with a relatively fast programming speed are generally only a part of the pages of the whole block, so that although a data programming speed can be improved if only the pages with the relatively fast programming speed are used, an applicable capacity of the flash memory is greatly reduced. Therefore, to use all of the storage capacity as much as possible, the pages with relatively fast or relatively slow programming speed are all used, though the data programming speed is reduced, and a whole programming efficiency cannot be improved.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.